Scope: global DRAM (including HBM) and NAND flash, at the chip-maker level. As of 18 September 2026. Built from Micron filings and call transcripts, SK hynix results, TrendForce, WSTS, Gartner, IDC, SEMI and cited trade press. Companion to Memory-Semiconductors-Industry-Growth-Outlook-Report.docx. Industry analysis, not a stock recommendation.
Size: ~$220bn in 2025 (Gartner, Aug 2026), $800-890bn forecast for 2026 (WSTS; Gartner; TrendForce), 2Q26 run-rate ~$935bn (inferred). Recent growth: bits up only low-to-mid 20s percent in 2026 (Micron); the rest is price, with server DRAM ~+270% (TrendForce). Profit pool: the top three hold 87.6% of DRAM revenue at 70-85% margins; we estimate more than 85% of industry profit goes to them (inferred).
Geographic mix: production is centred in Korea (over 60% of DRAM, inferred), with Taiwan, Japan, Singapore, China and, from 2027, the US. Demand by value is increasingly American (WSTS: Americas +112% in 2026). China is splitting off: CXMT and YMTC grow in trailing-edge and consumer segments behind export controls and procurement bans.
Agentic inference and custom HBM keep bit demand at ~23% a year while cleanroom lags; price per bit plateaus near 2.4x 2025. Revenue ~$1.5tn (2030), ~$2.2tn (2035).
Margins / ROCE: Operating margin 55-65% sustained; ROCE 35-45%.
Leading indicatorsContracted plateau, then partial normalisation. Bits ~19% a year; price per bit falls 30-40% from the 2027 peak to ~1.7x 2025. Revenue ~$900bn (2030), ~$1.25tn (2035).
Margins / ROCE: Operating margin 65-75% at peak, 35-45% by 2030; ROCE from above 60% to 20-25%.
Leading indicatorsAI capex digestion in 2028-29 meets the fab wave and CXMT at ~500k wafers/month. Price per bit falls 60-70% from peak to the 2025 level. Revenue ~$480bn (2030), ~$700bn (2035).
Margins / ROCE: Operating margin 0-10% trough in 2029, ~15% average; ROCE ~0 at trough, 5-10% average.
Leading indicatorsCAGR shown from the 2026E base of ~$840bn (Gartner, $837bn). From the 2025 base: base ~19%, upside ~26%, downside ~12% a year to 2035. Probability-weighted revenue: ~$894bn (2030), ~$1.28tn (2035). All scenario figures inferred.
| Force | Direction | Magnitude | Timing | Mechanism |
|---|---|---|---|---|
| HBM attach to AI accelerators | Tailwind | Large | 2025-2030 | HBM market ~$35bn (2025) to >$100bn (2027) (Micron) |
| Agentic inference and KV cache | Tailwind | Large | 2026-2032 | Up to 4x tokens; CPU:GPU 1:8 to 1:4 (TrendForce, May 2026) |
| Cloud and sovereign capex | Tailwind | Large | 2026-2028 | CSP capex +98% 2026, +50% 2027; memory 47% to 68% of it (TrendForce, Aug 2026) |
| AI storage (enterprise SSD) | Tailwind | Moderate | 2026-2030 | Top-5 eSSD revenue $37.6bn in 2Q26 (TrendForce, Sep 2026) |
| HBM trade ratio | Tailwind (limits supply) | Large | Ongoing | 3:1 at HBM3E, ~4:1 at HBM4E (Micron, Aug 2026) |
| Strategic contracts with floors | Tailwind (margin) | Moderate | 2026-2031 | 16 Micron SCAs, >$100bn at floor; ~10 SK hynix LTAs |
| Consumer devices | Headwind now | Moderate | 2026-2028 | Phones -13.9%, PCs -11.3% in 2026 (IDC) |
| Greenfield fabs | Headwind (price) | Large | 2027-2030 | Micron ID1 mid-2027, ID2 late 2028; SK hynix M17 1H29 |
| China capacity (CXMT, YMTC) | Headwind | Large | 2026-2030 | CXMT ~500k wafers/month by 2028, ~17% of supply (TechTimes, Jul 2026) |
| Subsidies and industrial policy | Headwind (returns) | Moderate | Ongoing | CHIPS up to $6.4bn (Micron); Korea KRW1,100tn; China IPOs $8.6bn + $4.6bn |
| Substitution and design-around | Headwind | Moderate | 2027+ | Compression, CXL pooling, HBF; slower content growth per server (Micron) |
| Source | Published | Horizon | CAGR | Why it differs |
|---|---|---|---|---|
| WSTS (Autumn) | Dec 2025 | 2026: $295bn | n/a | Pre-shortage prices |
| TrendForce | Jan 2026 | 2026: $551.6bn; 2027: $842.7bn | ~89% (2025-27) | Early shortage; contract prices only partly reset |
| WSTS (Spring) | Jun 2026 | 2026: $800bn+; 2027: ~+32% | ~123% (2025-27, inferred) | Survey of member companies; lags price moves |
| TrendForce | May 2026 | 2026: $889.3bn; 2027: $1,283bn | ~134% (2025-27) | Contract-price model; agentic AI demand |
| Gartner | Aug 2026 | 2026: $837.3bn; 2027: $1,076bn | ~121% (2025-27) | Price-led 2026, content-led 2027 |
| Micron (HBM only) | Jun 2026 | 2027: >$100bn HBM | ~69% (HBM, 2025-27) | Single segment; supplier view |
| This report, base | Sep 2026 | 2027: ~$1.0-1.1tn; 2030: ~$900bn; 2035: ~$1.25tn | ~118% (2025-27); ~4.5% (2026E-35) | Assumes forecasts overshoot at the turn |
Forecasts for 2026 more than tripled in six months. Method explains the spread: TrendForce reprices from contract prices fastest, WSTS aggregates member reports and lags. No published forecast covers a full cycle beyond 2027.
Memory is sold as bits, and bits of a given specification are close to interchangeable, so revenue equals bits shipped times a price set by industry-wide supply and demand. That is why growth in this industry is mostly a price story, and why price depends on the gap between bit demand and bit supply.
The market went from about $220bn in 2025 (Gartner, Aug 2026) to a 2Q26 run-rate near $935bn (inferred: 2Q26 DRAM $154.7bn plus NAND ~$79bn, times four; TrendForce). DRAM, including HBM, is about 70% of revenue and NAND about 30%. HBM and server RDIMM took 51% of DRAM bits in 2026 (TrendForce, Aug 2026).
Profit is more concentrated than revenue. Samsung, SK hynix and Micron hold 87.6% of DRAM revenue (TrendForce via Evertiq, Sep 2026) at 70-85% margins. Chinese suppliers take share mainly in trailing-edge DRAM and consumer NAND, where elasticity is highest and phone and PC units are falling.
Demand is being pulled by AI along three channels. HBM attaches to every accelerator. Agentic inference enlarges the KV cache and pushes CPU-to-GPU ratios from 1:8 toward 1:4, lifting server DRAM and SSD content (TrendForce, May 2026). Cloud capex nearly doubled to $660-690bn in 2026 (Futurum, Feb 2026).
Supply growth is capped because the HBM trade ratio (3:1 at HBM3E, about 4:1 at HBM4E) takes conventional bits out of the market (Micron, Aug 2026). Node migrations yield fewer bits per wafer, and new fabs take two to three years. Industry DRAM bits grow only in the low-to-mid 20s percent in 2026 (Micron Q3 FY2026 call).
Policy adds capacity. CHIPS grants of up to $6.4bn to Micron, Korean cluster programmes of KRW1,100tn for SK hynix, and Chinese IPOs of $8.6bn (CXMT) and $4.6bn (YMTC) lower private hurdle rates. That is growth for bits and a headwind for through-cycle margins.
Consumer demand is breaking under price. IDC forecasts smartphones down 13.9% and PCs down 11.3% in 2026. That is demand deferred, and it will support prices once they fall, but it removes the consumer cushion now.
NAND saturates first. TrendForce expects NAND supply growth to outpace demand in 2027, with prices under pressure from 2H27, while DRAM stays tight. Price increments are already slowing: conventional DRAM went from +60% or more q/q in 2Q26 to a forecast +13-18% in 3Q26.
Cyclicality is structural. Micron's gross margin went from 59% (FY2018) to -9% (FY2023). Capex is committed at peak prices: Micron alone plans about $27bn in FY2026 and more in FY2027. Contracts with floors dampen the next downturn. They do not stop it.
HBM4E turns the base die into a customer-specific logic chip, making HBM a co-designed component rather than a standard part. That is the strongest force moving part of memory out of commodity pricing (Micron, Aug 2026).
EUV at 1-gamma and 1-delta widens the gap between leading and trailing tiers, because Chinese firms cannot buy EUV. 3D DRAM and hybrid bonding are the next process resets and the most plausible way for a funded follower to catch up in the 2030s (inferred).
The cost curve is flattening. We assume DRAM cost per bit falls 8-12% a year, versus 15-25% historically (inferred; approx., unverified). That slows supply, which supports price, but it makes margins fall faster when prices fall.
The three DRAM leaders are an oligopoly that emerged from consolidation, now joined by an entrant that does not need to earn a commercial return. CXMT holds about 8% of DRAM, runs about 265,000 wafer starts a month and targets about 500,000 by 2028, roughly 17% of global supply (TechTimes, Jul 2026).
Power is shifting in three directions. Suppliers gain over buyers through allocation and contracts. Among the leaders, power goes to whoever executes on HBM. And challengers gain in the trailing edge the leaders are leaving: Nanya and Winbond grew revenue 68% and 76% q/q in 2Q26.
Moats are forming at the top of the stack (custom HBM co-design, floor-priced contracts, EUV know-how) and eroding at the bottom (trailing-edge DRAM, consumer NAND). Over the decade, industry economics depend on the mix between those two layers.
Each scenario is built as 2025 revenue (~$220bn) times a bit index times a price index. The base case (50%) sees revenue peak around $1.0-1.1tn in 2027, then ease to about $900bn in 2030 as greenfield fabs arrive and price per bit falls 30-40% from peak. Revenue reaches about $1.25tn by 2035.
The upside (20%) has agentic inference and custom HBM keep demand ahead of cleanroom additions: about $1.5tn in 2030 and $2.2tn in 2035. The downside (30%) has AI capex digestion coincide with the 2028-2030 capacity wave and CXMT's scale-up: about $480bn in 2030, still more than double 2025, and about $700bn by 2035.
The probability-weighted outcome is about $894bn in 2030 and $1.28tn in 2035. The mean looks like the base case, but the distribution is wide and skewed toward the downside, because every prior cycle ended in overcapacity.
Revenue peaks in 2027 in every scenario. Third-party 2027 forecasts range from $1.08tn (Gartner) to $1.28tn (TrendForce). The base case sits at the low end because forecasts made during shortages have overshot at past turns (inferred).
Base-case operating margin falls from 65-75% to 35-45% by 2030, still about double the 2010s through-cycle average (approx., unverified). ROCE falls faster than margin, from above 60% to 20-25%, because asset turnover drops as the 2026-2028 capex lands.
Industry capex is about $110-130bn in 2026 (approx., unverified), only about 15% of revenue, a record low ratio because prices are so high. Break-even: with a 15% tax rate and 0.7x turnover, a 10% cost of capital needs about 17% through-cycle operating margin (inferred). The base case clears that comfortably. The downside, at about 15%, does not.
Winners will combine leading-edge EUV DRAM, HBM stacking and co-design capability, cleanroom already under roof, and a portfolio of floor-priced contracts with creditworthy buyers backed by prepayments actually received.
Capital earns its cost in HBM and packaging paced to contracts, in node transitions, in enterprise and QLC SSD, and in empty cleanroom shells that keep options open. It is least likely to earn its cost in commodity NAND wafers, trailing-edge DRAM and any equipped capacity that assumes 2026 prices persist.
The overarching risk is that the industry's response to AI demand (fabs, Chinese scale, buyer design-around) arrives all at once in 2028-2030. Contract prices and prepayments will show it first.