Unit: one chip program won on a Teradyne platform. The chip designer picks the tester; every test house running that chip then buys Teradyne systems for the life of the program. Those testers sell at a 57–60% gross margin, and because R&D and SG&A are largely fixed, Semiconductor Test's pre-tax margin swings from about 25% in a trough to 38% at today's volumes (FY2025 10-K; Q2 2026 10-Q).
| What the business is | A maker of automatic test equipment (ATE) that decides whether each chip works before it ships. It is the smaller of two global suppliers, and also owns sub-scale robotics and electronics-test units. |
|---|---|
| Industry | Semiconductor back-end capital equipment. SoC plus memory testers were about $9.0B in CY2025 (Advantest estimate). |
| How it makes money | Sells testers, mostly to test houses and chipmakers, at a 57.3% product gross margin. Then earns service and upgrade revenue on the installed base: 16.6% of revenue at a 62.9% margin (FY2025 10-K). |
| Unit of economics | One chip program won on a Teradyne platform. The win pulls tester purchases for as long as that chip and its successors are in production. Semiconductor Test earned 27.8% pre-tax in FY2025 and 38.1% in Q2 2026. |
| What protects it | Switching a program takes 9–12 months of qualification and correlation. Test programs are written for the platform's software. Only two vendors operate at global scale. |
| What drives earnings | AI compute and networking tester demand, which was more than 60% of Q2 2026 revenue. Memory (HBM/DRAM) final test. Operating leverage on a largely fixed R&D and SG&A base. |
| What to watch | Share at merchant-GPU and hyperscaler programs. Top-five customer concentration (44%). Advantest's tester-market outlook. Robotics losses. |
| Cycle exposure | High. Currently running above the 2021 peak on revenue run-rate and margin. |
Every chip is tested before it is sold. A defective processor that reaches a server or phone costs its maker far more than the test that would have caught it. The chip designer therefore writes a test program that exercises every function of the device, and runs it on a tester at wafer sort, at final (package) test and, increasingly, at system level. Teradyne builds those testers: UltraFLEX and UltraFLEXplus for complex compute chips, J750 for microcontrollers, Magnum for flash, DRAM and HBM, and ETS for power semiconductors (FY2025 10-K).
The unit of economics is a chip program won on a Teradyne platform. Teradyne's filings separate the "specifying customer" (an OEM, IDM or fabless designer who "chooses platforms and drives demand") from the "purchasing customer" who places the order, often an outsourced test house (OSAT) (FY2025 10-K). A win at the specifier therefore turns into tester orders at every OSAT that tests that chip, sized by the chip's unit volume and its test time. Test time rises with transistor count and packaging complexity, so a larger AI chip needs more tester-hours per unit (inferred from company descriptions). Tester price and units shipped are not disclosed (NOT FOUND).
"Teradyne typically has a specifying customer such as an OEM, IDM, or Fabless company, who chooses platforms and drives demand, and a purchasing customer who actually places the order."Teradyne FY2025 10-K
Tracing one unit: Teradyne designs the tester and outsources most assembly to Flex and Plexus in Malaysia and Thailand, with FLEX production growing at its own site in Cebu, Philippines (FY2025 10-K). Revenue is recognised when the hardware ships or is delivered; customer acceptance is "typically a formality." Service contracts and extended warranties are recognised over time. In upcycles customers pay in advance: customer advances rose from $85.8M at December 2025 to $118.0M at June 2026 (Q2 2026 10-Q).
Revenue is transactional rather than recurring. Service fell from 21.7% of revenue in 2023 to 16.6% in 2025 and 10.4% in Q2 2026, because tester shipments grew much faster than the installed base (FY2025 10-K; Q2 2026 10-Q). The service line carries the higher margin (62.9% versus 57.3% for product in FY2025), but it cushions a downturn rather than defines the business.
The company has three segments (FY2025 10-K). Semiconductor Test was $2,524M of FY2025 revenue (79%), split into SoC $1,890M, memory $505M and Integrated System Test $129M. Product Test ($358M) holds board test, defence and aerospace, wireless test, photonics test (Quantifi) and, from April 2026, high-speed I/O test (MultiLane JV). Robotics ($308M) is Universal Robots (collaborative arms) and MiR (mobile robots). It lost $99.4M pre-tax in 2025.
Two portfolio moves show where the economics sit. In 2024 Teradyne sold its Device Interface Solutions (probe and load board) business to Technoprobe for $85M and took a 10% stake in Technoprobe instead (FY2024 10-K). That swapped a lower-margin, customised hardware line for exposure to the probe-card leader. Robotics, bought for roughly $620M across Universal Robots, MiR, Energid and AutoGuide, has lost about $293M of cumulative segment profit from 2015 to 2025 (FY2016–FY2025 10-Ks, summed).
The industry is a duopoly with a clear leader. Advantest estimates the CY2025 tester market at about $6.9B for SoC and $2.1B for memory. It puts its own share at 66% of SoC (up about 10 points) and around 60% of memory (Advantest FY2025 results note, April 2026). Teradyne names Advantest, SPEA and Cohu as competitors (FY2025 10-K). Cohu reported $453M of FY2025 revenue and a GAAP net loss, which marks it as sub-scale (Cohu Q4 2025 release). Teradyne therefore holds most of the remaining third (inferred).
The profit pool is concentrated where test is hardest. Teradyne's own split of the 2025 SoC market was about $5B compute, $1B mobile, just under $1B automotive and industrial, and $0.7B service (Q4 2025 call). Advantest converted its lead into a 44.2% operating margin in the year to March 2026, against Teradyne's 20.4% group margin for calendar 2025 and 27.8% pre-tax margin in Semiconductor Test (Advantest FY2025 financial results; FY2025 10-K). Part of that gap is Robotics dilution. Most is scale in the fastest-growing sockets, merchant GPUs, where Advantest has the incumbent position (inferred).
The barrier that binds is program-level switching cost, not capital. Teradyne describes four phases to win a socket: an opportunity to compete, a working solution, correlation, and production ramp. Each takes "9 to 12 months from the start to ramp." A fast follower grows "from 0 up to about 30%" share (Q2 2026 call). Correlation is the costly step: the customer must prove the new tester gives the same pass/fail results as the incumbent on millions of devices. Test programs written for one platform's software (IG-XL at Teradyne) must also be rebuilt. The consequence is that share is sticky within a chip generation but re-contestable at each new one.
"If successful, it takes 9 to 12 months from the start to ramp."Teradyne Q2 2026 earnings call, on winning a new compute customer
Market share is therefore local to each customer. Teradyne held about 50% of vertically integrated (VIP, i.e. hyperscaler custom) compute test in 2025, and warned that "no share is safe" (Q4 2025 call). At merchant GPUs it is a new entrant: its first order came in Q1 2026 and shipped in Q2 (Q2 2026 call). Management describes one compute customer as a mature dual-vendor, one as fast-follower and one in qualification (Q2 2026 call). In memory, the 10-K claims "share gains in HBM and DRAM final test" (FY2025 10-K). Outside evidence partially supports this: Advantest reported its memory share down about 2 points in CY2025.
Teradyne's structural advantages are an installed base at test houses and software built for multi-site economics. The filings have long pitched FLEX as lowering "cost of test" by testing many devices at once, and as attractive to OSATs that can "leverage their capital investments" across customers (FY2016–FY2025 10-Ks). The last disclosed installed base was more than 8,000 FLEX, 3,200 Magnum and 5,600 ETS systems (FY2020 10-K). The count has not been reported since (NOT FOUND). The Technoprobe stake adds a tie to the probe-card layer, though Advantest also bought 2.5% of Technoprobe in January 2025 (Advantest release).
Two forces could weaken the position. First, US export controls: the 10-K says restrictions are "limiting our ability to be competitive … where some competitors are not subjected to the same restrictions" (FY2025 10-K). China was still 14% of 2025 revenue, and domestic testers such as Hangzhou Changchuan are growing quickly, though that evidence rests on aggregator data rather than filings. Second, Advantest is adding capacity toward 10,000 SoC systems a year by around 2028 (Advantest April 2026 Q&A). This raises the bar on delivery in any future shortage.
What wins in ATE is being the platform chosen at the start of the fastest-growing device programs, then having the capacity and correlation data to ramp. In 2025 that was Advantest at merchant GPUs. Teradyne is that kind of company at custom compute ASICs and in memory final test. It is not yet that kind of company at merchant GPUs, the largest pool.
Growth is set by how many new chip programs Teradyne wins, multiplied by those chips' unit volumes and test intensity. Revenue rose 13.1% in FY2025 and 95.3% in the first half of 2026 (FY2025 10-K; Q2 2026 10-Q). Almost all of the increase came from Semiconductor Test: SoC revenue more than doubled in Q2 2026 ($843M versus $397M) and memory rose 249% ($212M versus $61M). Management says AI-driven revenue was more than 60% of Q2 2026 sales and compute was 70% of SoC product revenue (Q2 2026 call). Volume and price cannot be separated, because tester units and prices are not disclosed (NOT FOUND).
| Growth decomposition | FY2025 | 1H2026 |
|---|---|---|
| Reported revenue growth | +13.1% | +95.3% |
| Product Test increase (holds acquired photonics/high-speed units) | +$26.9M | +$28.5M |
| Organic growth if all of that were acquired (floor) | ≥12.2% | ≥93% |
| Semiconductor Test growth | +18.8% | +116% |
Sources: FY2025 10-K; Q2 2026 10-Q. Floors derived; acquisition revenue contributions are NOT FOUND. Tester volume and price cannot be separated.
Reported versus organic. Acquisitions are small next to the growth, but they exist: Infineon's test unit (January 2025, $18.3M), Quantifi Photonics (May 2025, $127.2M), the MultiLane JV (April 2026, $157.8M for 75%) and TestInsight (April 2026, $29.0M) (FY2025 10-K; Q1 and Q2 2026 10-Qs). None discloses its revenue contribution (NOT FOUND). The acquired photonics and high-speed businesses sit in Product Test, which grew $26.9M in FY2025 and $28.5M in 1H2026. Even if all of that were acquired, organic growth was at least 12.2% in FY2025 and at least 93% in 1H2026 (inferred floor).
Hyperscaler custom ASICs, networking chips and CPUs are larger and more complex, so test time per device rises. The current spike reflects a data-centre build-out that can pause. Evidence: SoC revenue up 113% in Q2 2026.
Stacked high-bandwidth memory needs more final test per bit. Memory revenue has run above $200M for three straight quarters. Management expects the 2026 memory tester market to be more than 40% larger than 2025, with book-to-bill above 2 in Q2 (Q2 2026 call).
A second vendor typically builds from zero to about 30% share. Management says a low double-digit merchant-GPU share is enough to reach its $6B model (Q1 2026 call). This is the lever with the largest range of outcomes.
Bought or built to follow AI data-centre content, from co-packaged optics to hard-drive demand. Each is small today.
Mobile remains "below historical levels" (Q2 2026 call), and IDC expects 2026 smartphone units down 16.7%. A recovery would add volume to a mature installed base.
Management's evergreen target model shows about $6B of revenue, 59–61% gross margin, 30–34% operating margin and $9.50–11 non-GAAP EPS at a $12–14B tester market (Q4 2025 call). It also expects the market to "reach or exceed $20 billion" by the end of the decade (Q2 2026 call). Both are company projections, not evidence. Advantest's own outlook of a $13.0–14.5B CY2026 market means the model's TAM assumption is already being met (Advantest July 2026 results note).
Gross margin barely moves through the cycle; operating margin moves violently. Group gross margin stayed between 53.3% (2014) and 59.6% (2021) for twelve years, and reached 60.3% in 1H2026 (FY2016–FY2025 10-Ks; Q2 2026 10-Q). Pricing is set per program and the product is outsourced, so cost of goods flexes with volume. R&D ($505M) and selling and admin ($649M) in FY2025 do not flex. As a result operating margin ran 32.4% at the 2021 peak, 18.7% at the 2023 trough and 34.9% in 1H2026.
| Metric | FY2021 (peak) | FY2023 (trough) | FY2025 | 1H2026 |
|---|---|---|---|---|
| Revenue ($M) | 3,702.9 | 2,676.3 | 3,190.0 | 2,611.5 |
| Gross margin | 59.6% | 57.4% | 58.2% | 60.3% |
| Operating margin | 32.4% | 18.7% | 20.4% | 34.9% |
| Diluted EPS ($) | 5.53 | 2.73 | 3.47 | 4.91 |
| Free cash flow ($M) | 965.9 | 425.6 | 450.4 | 578.8 |
| Diluted shares (M) | 183.6 | 164.3 | 159.7 | 157.7 (Q2) |
Sources: FY2022, FY2024, FY2025 10-Ks; Q2 2026 10-Q. Free cash flow is operating cash flow less capex (derived). Consolidated figures are comparable across years, but segment figures are not: storage and system-level test moved into Semiconductor Test in the FY2024 10-K, a Product Test segment was created in 2025, and segment profit began including stock compensation, amortisation and restructuring from FY2024.
Cash conversion weakens in upcycles. Receivables rose from $471M at December 2024 to $1,110M at June 2026, and two customers held about 22% and 20% of receivables at December 2025 (FY2025 10-K; Q2 2026 10-Q). Supplier prepayments ($412M) and purchase commitments ($1,781M, mostly due within a year) have also risen to secure capacity. Most minimum purchase commitments carry no cancellation penalty, which limits the downside if demand turns (Q2 2026 10-Q). Capex rose to $224M in 2025, including a Cebu manufacturing building. The maintenance-versus-growth split is not disclosed (NOT FOUND).
Capital allocation, 2015–2025, ranked by cash (10-Ks, summed): buybacks about $4.71B; capex about $1.59B; acquisitions and investments of roughly $1.3B, of which about $620M went to robotics and $524M to Technoprobe; dividends about $0.71B; and $460M to retire the 2016 convertible notes. Buybacks plus dividends roughly equalled the period's $5.4B of free cash flow. Diluted shares fell 25%, from 213.3M to 159.7M.
The pattern is a company that treats excess cash as belonging to shareholders and returns it through the cycle. In 2025 it returned $778M against $450M of free cash flow and drew $200M on its revolver to fund the gap and the manufacturing ramp (FY2025 10-K). It repaid that by March 2026.
On 7 August 2026, after the latest 10-Q, it replaced its $750M revolver with an undrawn $1.0B five-year secured facility at SOFR + 1.00–1.75% (8-K, 10 August 2026). The balance sheet carried no debt and $517M of cash and securities at June 2026. The Technoprobe stake is carried at $515M under the equity method, against a disclosed market value of $2,458M (Q2 2026 10-Q).
The business is highly cyclical because customers buy testers for capacity, not replacement. When chip volumes stop growing, the existing installed base is enough and new orders collapse. Semiconductor Test revenue fell from $2,642M in 2021 to $1,957M in 2023, and its pre-tax margin from 37.0% to 25.5% (FY2022 and FY2024 10-Ks; 2021 is on the pre-recast segment definition). The 2016 Wireless collapse shows a harsher version: "reuse of wireless test equipment, price competition and different testing techniques" (FY2016 10-K).
Teradyne sits above its prior peak today. Semiconductor Test booked $2,233M in 1H2026, already 85% of full-year 2021, at a 40.1% pre-tax margin against 37.0% at that peak (Q2 2026 10-Q). Q2 2026 gross margin of 59.8% is slightly above the 59.6% full-year high of 2021. A record margin at a cyclical high means the earnings base is at its most exposed, not its most secure. Management expects 2026 to be first-half weighted, with 50–52% of revenue in the first half, and guides Q3 revenue at $1.2–1.3B (Q2 2026 call and release).
End-market and geographic exposure has concentrated. More than 60% of revenue is AI-driven. Taiwan rose from 14% of revenue in 2023 to 41% in 1H2026, Korea was 20% and China 11%. The top five direct customers were 44% of 2025 revenue, up from 32% in 2023 (FY2025 10-K; Q2 2026 10-Q).
The downside case is a pause in AI data-centre capex. Chip unit growth would slow, OSATs would stop adding test capacity, and tester orders would fall faster than chip revenue, as in 2023, when the SoC and memory tester market fell about 15%, from roughly $5.2B to $4.4B (Advantest April 2024 results note). Memory would follow once the HBM shortage eases.
| Revenue by customer location | 2023 | 2024 | 2025 | 1H2026 |
|---|---|---|---|---|
| Taiwan | 14% | 21% | 36% | 41% |
| Korea | 15% | 25% | 14% | 20% |
| China | 12% | 13% | 14% | 11% |
| United States | 16% | 13% | 11% | 7% |
| Japan | 11% | 6% | 2% | 1% |
| AI-driven share of revenue | — | — | majority of 2H25 | >60% (Q2) |
Sources: FY2025 10-K; Q2 2026 10-Q; AI share from FY2025 10-K language and Q2 2026 call.
| Indicator | Why it matters | Where published |
|---|---|---|
| Advantest tester-market size and share | Only outside read on duopoly share | Advantest quarterly results notes (Jan/Apr/Jul/Oct) |
| Customer advances, deferred revenue, purchase commitments | Leading signal of orders and supply build | Teradyne 10-Q notes |
| Top-customer and geographic concentration | Program-win durability | Teradyne 10-K revenue note |
| Merchant GPU and hyperscaler qualification status | Largest swing lever | Teradyne earnings calls |
| TSMC and hyperscaler capex; memory-maker capex | Drives OSAT test capacity | TSMC, hyperscaler and SK hynix/Samsung/Micron results |
| Test equipment spending | Industry cycle | SEMI equipment forecasts (July, December) |
| Robotics pre-tax result | Drag on margin; goodwill test | Teradyne segment note |
Before a thesis: establish how durable the custom-compute share is at the next ASIC generation; how far merchant-GPU share can realistically go; and what trough earnings look like with today's concentration and a larger cost base.